搜索资源列表
DDR3_config(1)
- DDR3控制器文档,可参考进行DDR3软件FPGA开发-DDR3 document controller, it can be reference for DDR3 FPGA software development
DDR3_config(2)
- DDR3控制器文档,可参考进行DDR3软件FPGA开发-DDR3 document controller data sheet2,FPGA development
axi_master
- DDR3 控制器,axi4_full 模式, burst长度为16,应用于xilinx平台。-DDR3 interface controller, axi4_full working mode with burst length 16, can operate on the xilinx platform.
DDR3_controler
- s6和k7 fpga的ddr3 ip控制器使用说明;(S6 and K7 FPGA DDR3 IP controller use instructions)